Preliminary programme
(below you find the list of accepted papers in alphabetical order) Thuesday, June 30
19.00 Conference Reception Wednesday, July 1
9.00 - 9.30: Opening
9.30 - 10.30: Invited Talk
Steve Furber: Biologically-Inspired Massively-Parallel Architectures - computing beyond a million processors
10.30 - 11.00 Coffee Break
11.00 - 12.10 Session 1: Petri Net Synthesis and Tools
Sebastian Mauser and Robert Lorenz: Variants of the Language Based Synthesis Problem for Petri Nets
Josep Carmona, Jordi Cortadella and Michael Kishinevsky: Genet: a Tool for the Synthesis and Mining of Petri Nets
Mark Schaefer, Dominic Wist and Ralf Wollowski: DesiJ - Enabling Decomposition-based Synthesis of Complex Asynchronous Controllers
12.10 - 14.00 Lunch
14.00 - 15.00 Session 2: Process Algebra
Victor Khomenko and Roland Meyer: Checking pi-Calculus Structural Congruence is Graph Isomorphism Complete
Antti Tapani Siirtola and Juha Kortelainen: Parameterised Process Algebraic Verification by Precongruence Reduction
15.00 - 15.30 Coffee Break
15.30 - 16.30 Session 3: Interfaces
Partha Roop, Alain Girault, Roopak Sinha and Gregor Goessler: Specification Enforcing Refinement for Convertibility Verification
Jean-Baptiste Raclet, Eric Badouel, Albert Benveniste, Benoit Caillaud and Roberto Passerone: Why are modalities good for Interface Theories?
16.30 - 17.30 Tool Demonstration Thursday, July 2
9.00 - 10.00: Invited Talk
Gerhard Schellhorn: Formal Verification of Lock-Free Algorithms
10.00 - 10.30 Coffee Break
10.30 - 12.00 Session 4: Petri Nets and STGs
Hind Rakkay, Hanifa Boucheneb and Olivier Henri Roux: Time Arc Petri Nets and their analysis
Josep Carmona, Jorge Julvez, Jordi Cortadella and Michael Kishinevsky: Scheduling synchronous elastic designs
Andrey Mokhov, Victor Khomenko and Alex Yakovlev: Flat Arbiters
12.00 - 13.30 Lunch
13.30 - 14.30 Session 5: Desychronization
Jens Brandt, Mike Gemünde and Klaus Schneider: Desynchronising Synchronous Programs by Modes
Dumitru Potop Butucaru, Robert de Simone, Yves Sorel and Jean-Pierre Talpin: From Concurrent Multiclock Programs to Deterministic Asynchronous Implementations
14.30 - 15.00 Coffee Break
15.00 - 16.00 Session 6: Circuits
Matthias Raffelsieper, Jan-Willem Roorda and MohammadReza Mousavi: Model Checking Verilog Descriptions of Cell Libraries
Andrew Bardsley, Luis Tarazona and Doug Edwards: Teak: A Token-Flow Implementation for the Balsa Language
16.30 - 18.30 Visit of the Fuggerei (oldest social settlement in existence in the world, founded by for Jakob Fugger (1459-1525), one of the richest men in history)
19.30 Conference Dinner Friday, July 3
9.00 - 10.00: Invited Talk
Yosinori Watanabe: Examining important corner cases: verification of interacting architectural components in system designs
10.00 - 10.30 Session 7: System Analysis
Silvia Crafa, Francesco Ranzato and Francesco Tapparo: Saving Space in a Time Efficient Simulation Algorithm
10.30 - 11.00 Coffee Break
11.00 - 12.30 Session 8: Services
Karsten Wolf, Christian Stahl, Robert Danitz and Janine Ott: Verifying Livelock Freedom in an SOA Scenario
Niels Lohmann and Karsten Wolf: Petrifying Operating Guidelines for Services
Arjan Mooij and Marc Voorhoeve: Trading off concurrency to generate behavioral adapters
12.30 - 12.45 Closing
12.45 Lunch
top List of accepted papers:
Jens Brandt, Mike Gemünde and Klaus Schneider. Desynchronising Synchronous Programs by Modes
Dumitru Potop Butucaru, Robert de Simone, Yves Sorel and Jean-Pierre Talpin. From Concurrent Multiclock Programs to Deterministic Asynchronous Implementations
Josep Carmona, Jordi Cortadella and Michael Kishinevsky. Genet: a Tool for the Synthesis and Mining of Petri Nets (Tool paper)
Josep Carmona, Jorge Julvez, Jordi Cortadella and Michael Kishinevsky. Scheduling synchronous elastic designs
Silvia Crafa, Francesco Ranzato and Francesco Tapparo. Saving Space in a Time Efficient Simulation Algorithm
Victor Khomenko and Roland Meyer. Checking pi-Calculus Structural Congruence is Graph Isomorphism Complete
Niels Lohmann and Karsten Wolf. Petrifying Operating Guidelines for Services Andrew Bardsley, Luis Tarazona and Doug Edwards. Teak: A Token-Flow Implementation for the Balsa Language
Sebastian Mauser and Robert Lorenz. Variants of the Language Based Synthesis Problem for Petri Nets
Andrey Mokhov, Victor Khomenko and Alex Yakovlev. Flat Arbiters
Arjan Mooij and Marc Voorhoeve. Trading off concurrency to generate behavioral adapters
Jean-Baptiste Raclet, Eric Badouel, Albert Benveniste, Benoit Caillaud and Roberto Passerone. Why are modalities good for Interface Theories?
Matthias Raffelsieper, Jan-Willem Roorda and MohammadReza Mousavi. Model Checking Verilog Descriptions of Cell Libraries
Hind Rakkay, Hanifa Boucheneb and Olivier Henri Roux. Time Arc Petri Nets and their analysis
Partha Roop, Alain Girault, Roopak Sinha and Gregor Goessler. Specification Enforcing Refinement for Convertibility Verification
Mark Schaefer, Dominic Wist and Ralf Wollowski. DesiJ - Enabling Decomposition-based Synthesis of Complex Asynchronous Controllers (Tool paper)
Antti Tapani Siirtola and Juha Kortelainen. Parameterised Process Algebraic Verification by Precongruence Reduction
Karsten Wolf, Christian Stahl, Robert Danitz and Janine Ott. Verifying Livelock Freedom in an SOA Scenario
top
(below you find the list of accepted papers in alphabetical order) Thuesday, June 30
19.00 Conference Reception Wednesday, July 1
9.00 - 9.30: Opening
9.30 - 10.30: Invited Talk
Steve Furber: Biologically-Inspired Massively-Parallel Architectures - computing beyond a million processors
10.30 - 11.00 Coffee Break
11.00 - 12.10 Session 1: Petri Net Synthesis and Tools
Sebastian Mauser and Robert Lorenz: Variants of the Language Based Synthesis Problem for Petri Nets
Josep Carmona, Jordi Cortadella and Michael Kishinevsky: Genet: a Tool for the Synthesis and Mining of Petri Nets
Mark Schaefer, Dominic Wist and Ralf Wollowski: DesiJ - Enabling Decomposition-based Synthesis of Complex Asynchronous Controllers
12.10 - 14.00 Lunch
14.00 - 15.00 Session 2: Process Algebra
Victor Khomenko and Roland Meyer: Checking pi-Calculus Structural Congruence is Graph Isomorphism Complete
Antti Tapani Siirtola and Juha Kortelainen: Parameterised Process Algebraic Verification by Precongruence Reduction
15.00 - 15.30 Coffee Break
15.30 - 16.30 Session 3: Interfaces
Partha Roop, Alain Girault, Roopak Sinha and Gregor Goessler: Specification Enforcing Refinement for Convertibility Verification
Jean-Baptiste Raclet, Eric Badouel, Albert Benveniste, Benoit Caillaud and Roberto Passerone: Why are modalities good for Interface Theories?
16.30 - 17.30 Tool Demonstration Thursday, July 2
9.00 - 10.00: Invited Talk
Gerhard Schellhorn: Formal Verification of Lock-Free Algorithms
10.00 - 10.30 Coffee Break
10.30 - 12.00 Session 4: Petri Nets and STGs
Hind Rakkay, Hanifa Boucheneb and Olivier Henri Roux: Time Arc Petri Nets and their analysis
Josep Carmona, Jorge Julvez, Jordi Cortadella and Michael Kishinevsky: Scheduling synchronous elastic designs
Andrey Mokhov, Victor Khomenko and Alex Yakovlev: Flat Arbiters
12.00 - 13.30 Lunch
13.30 - 14.30 Session 5: Desychronization
Jens Brandt, Mike Gemünde and Klaus Schneider: Desynchronising Synchronous Programs by Modes
Dumitru Potop Butucaru, Robert de Simone, Yves Sorel and Jean-Pierre Talpin: From Concurrent Multiclock Programs to Deterministic Asynchronous Implementations
14.30 - 15.00 Coffee Break
15.00 - 16.00 Session 6: Circuits
Matthias Raffelsieper, Jan-Willem Roorda and MohammadReza Mousavi: Model Checking Verilog Descriptions of Cell Libraries
Andrew Bardsley, Luis Tarazona and Doug Edwards: Teak: A Token-Flow Implementation for the Balsa Language
16.30 - 18.30 Visit of the Fuggerei (oldest social settlement in existence in the world, founded by for Jakob Fugger (1459-1525), one of the richest men in history)
19.30 Conference Dinner Friday, July 3
9.00 - 10.00: Invited Talk
Yosinori Watanabe: Examining important corner cases: verification of interacting architectural components in system designs
10.00 - 10.30 Session 7: System Analysis
Silvia Crafa, Francesco Ranzato and Francesco Tapparo: Saving Space in a Time Efficient Simulation Algorithm
10.30 - 11.00 Coffee Break
11.00 - 12.30 Session 8: Services
Karsten Wolf, Christian Stahl, Robert Danitz and Janine Ott: Verifying Livelock Freedom in an SOA Scenario
Niels Lohmann and Karsten Wolf: Petrifying Operating Guidelines for Services
Arjan Mooij and Marc Voorhoeve: Trading off concurrency to generate behavioral adapters
12.30 - 12.45 Closing
12.45 Lunch
top List of accepted papers:
Jens Brandt, Mike Gemünde and Klaus Schneider. Desynchronising Synchronous Programs by Modes
Dumitru Potop Butucaru, Robert de Simone, Yves Sorel and Jean-Pierre Talpin. From Concurrent Multiclock Programs to Deterministic Asynchronous Implementations
Josep Carmona, Jordi Cortadella and Michael Kishinevsky. Genet: a Tool for the Synthesis and Mining of Petri Nets (Tool paper)
Josep Carmona, Jorge Julvez, Jordi Cortadella and Michael Kishinevsky. Scheduling synchronous elastic designs
Silvia Crafa, Francesco Ranzato and Francesco Tapparo. Saving Space in a Time Efficient Simulation Algorithm
Victor Khomenko and Roland Meyer. Checking pi-Calculus Structural Congruence is Graph Isomorphism Complete
Niels Lohmann and Karsten Wolf. Petrifying Operating Guidelines for Services Andrew Bardsley, Luis Tarazona and Doug Edwards. Teak: A Token-Flow Implementation for the Balsa Language
Sebastian Mauser and Robert Lorenz. Variants of the Language Based Synthesis Problem for Petri Nets
Andrey Mokhov, Victor Khomenko and Alex Yakovlev. Flat Arbiters
Arjan Mooij and Marc Voorhoeve. Trading off concurrency to generate behavioral adapters
Jean-Baptiste Raclet, Eric Badouel, Albert Benveniste, Benoit Caillaud and Roberto Passerone. Why are modalities good for Interface Theories?
Matthias Raffelsieper, Jan-Willem Roorda and MohammadReza Mousavi. Model Checking Verilog Descriptions of Cell Libraries
Hind Rakkay, Hanifa Boucheneb and Olivier Henri Roux. Time Arc Petri Nets and their analysis
Partha Roop, Alain Girault, Roopak Sinha and Gregor Goessler. Specification Enforcing Refinement for Convertibility Verification
Mark Schaefer, Dominic Wist and Ralf Wollowski. DesiJ - Enabling Decomposition-based Synthesis of Complex Asynchronous Controllers (Tool paper)
Antti Tapani Siirtola and Juha Kortelainen. Parameterised Process Algebraic Verification by Precongruence Reduction
Karsten Wolf, Christian Stahl, Robert Danitz and Janine Ott. Verifying Livelock Freedom in an SOA Scenario
top